CLA40MT1200NHR 1~ triac three quadrants operation: qi - qiii high efficiency thyristor 2 1 3 part number CLA40MT1200NHR backside: isolated - negative half cycle positive half cycle + qii qi qiii qiv i gt - + i gt three q u a dr a nt s o p e r a tion note: all polarities are referenced to t1 t2 t1 ref (-) i gt t2 t1 ref (-) i gt t2 t1 ref (+) i gt tav t v v 1.3 rrm 20 1200 = v = v i = a features / advantages: applications: package: triac for line frequency three quadrants operation - qi - qiii planar passivated chip long-term stability of blocking currents and voltages line rectifying 50/60 hz softstart ac motor control dc motor control power converter ac power control lighting and temperature control iso247 industry standard outline rohs compliant epoxy meets ul 94v-0 isolation voltage: v~ 3600 the data contained in this product data sheet is ex clusively intended for technically trained staff. t he user will have to evaluate the suitability of th e product for the intended application and the completeness of the product data with respect t o his application. the specifications of our compon ents may not be considered as an assurance of compo nent characteristics. the information in the valid application- and assembly notes must be considered. should you require produc t information in excess of the data given in this p roduct data sheet or which concerns the specific application of your product, please co ntact your local sales office. due to technical requirements our product may conta in dangerous substances. for information on the typ es in question please contact your local sales offi ce. should you intend to use the product in aviation, i n health or life endangering or life support applic ations, please notify. for any such application we urgently recommend - to perform joint risk and quality assessments; - the conclusion of quality agreements; - to establish joint measures of an ongoing product survey, and that we may make delivery dependent on the realization of any such measures. terms conditions of usage: ixys reserves the right to change limits, condition s and dimensions. 20161111a data according to iec 60747and per semiconductor un less otherwise specified ? 2016 ixys all rights reserved
CLA40MT1200NHR v = v a2s a2s a2s a2s symbol definition ratings typ. max. i v i a v t 1.31 r 1.2 k/w min. 20 v v 50 t = 25c vj t = c vj ma 1 v = v t = 25c vj i = a t v t = c c 100 p tot 105 w t = 25c c 20 1200 forward voltage drop total power dissipation conditions unit 1.63 t = 25c vj 125 v t0 v 0.86 t = c vj 150 r t 21.4 m ? v 1.30 t = c vj i = a t v 20 1.71 i = a40 i = a40 threshold voltage slope resistance for power loss calculation only a 125 v v 1200 t = 25c vj i a 31 p gm w t = 30 s 5 max. gate power dissipation p t = c c 150 w t = 2.5 p p gav w 0.5 average gate power dissipation c j 9 junction capacitance v = v230 t = 25c f = 1 mhz r vj pf i tsm t = 10 ms; (50 hz), sine t = 45c vj max. forward surge current t = c vj 150 i2t t = 45c value for fusing t = c 150 v = 0 v r v = 0 v r v = 0 v v = 0 v t = 8,3 ms; (60 hz), sine t = 10 ms; (50 hz), sine t = 8,3 ms; (60 hz), sine t = 10 ms; (50 hz), sine t = 8,3 ms; (60 hz), sine t = 10 ms; (50 hz), sine t = 8,3 ms; (60 hz), sine vj r vj r thjc thermal resistance junction to case t = c vj 150 180 195 120 115 aa a a 155 165 160 160 1200 300 s rms forward current per phase rms tav 180 sine average forward current (di/dt) cr a/s 150 repetitive, i = t vj = 150 c; f = 50 hz critical rate of rise of current v gt gate trigger voltage v = 6 v t = c25 (dv/dt) t = 150c critical rate of rise of voltage a/s 500 v/s t = s; i a; v = ? v r = ; method 1 (linear voltage rise) vj d vj 60 a t pg = 0.15 di /dt a/s; g = 0.15 drm cr v = ? v drm gk 500 1.5 v t = c -40 vj i gt gate trigger current v = 6 v t = c25 d vj 60 ma t = c -40 vj 2.5 v 100 ma v gd gate non-trigger voltage t = c vj 0.2 v i gd gate non-trigger current 3 ma v = ? v d drm 150 latching current t = c vj 75 ma i l 25 t s p = 10 i a; g = 0.1 di /dt a/s g = 0.1 holding current t = c vj 50 ma i h 25 v = 6 v d r = gk gate controlled delay time t = c vj 2 s t gd 25 i a; g = 0.1 di /dt a/s g = 0.1 v = ? v d drm turn-off time t = c vj 150 s t q di/dt = a/s 10 dv/dt = v/s 20 v = r 100 v; i a; t = 20 v = ? v drm t s p = 200 non-repet., i = 20 a t 125 r thch thermal resistance case to heatsink k/w thyristor 1300 rrm/drm rsm/dsm max. non-repetitive reverse/forward blocking voltag e max. repetitive reverse/forward blocking voltage r/d reverse current, drain current tt r/d r/d 200 0.25 ixys reserves the right to change limits, condition s and dimensions. 20161111a data according to iec 60747and per semiconductor un less otherwise specified ? 2016 ixys all rights reserved
CLA40MT1200NHR ratings 000000 yywwz logo part number datecode assembly code abcdef product marking assembly line c l a 40 mt 1200 n hr part description thyristor (scr) high efficiency thyristor (up to 1200v) 1~ triac three quadrants operation: qi - qiii iso247 (3) = = = = cla80mt1200nhr iso247 (3) 1200 current rating [a] reverse voltage [v] = = = = package t op c m d nm 1.2 mounting torque 0.8 t vj c 150 virtual junction temperature -55 weight g 6 symbol definition typ. max. min. conditions operation temperature unit f c n 120 mounting force with clip 20 v v t = 1 second v t = 1 minute isolation voltage mm mm 2.7 4.1 d spp/app creepage distance on surface | striking distance th rough air d spb/apb terminal to backside i rms rms current 50 a per terminal 125 -55 terminal to terminal iso247 similar part package voltage class cla60mt1200nhr iso247 (3) 1200 delivery mode quantity code no. ordering number marking on product ordering 50/60 hz, rms; i 1 ma isol CLA40MT1200NHR 521685 tube 30 CLA40MT1200NHR standard 3600 isol t stg c 150 storage temperature -55 3000 threshold voltage v 0.86 m ? v 0 max r 0 max slope resistance * 18.9 equivalent circuits for simulation t = vj i v 0 r 0 thyristor 150 c * on die level ixys reserves the right to change limits, condition s and dimensions. 20161111a data according to iec 60747and per semiconductor un less otherwise specified ? 2016 ixys all rights reserved
CLA40MT1200NHR s ? p 2x d3 d1 e1 4 1 2 3 l l1 2x b2 3x b b4 2x e 2x e2 d e q a a2 a1 c d2 2x e3 a3 min max min max a 4.70 5.30 0.185 0.209 a1 2.21 2.59 0.087 0.102 a2 1.50 2.49 0.059 0.098 a3 typ. 0.05 typ. 0.002 b 0.99 1.40 0.039 0.055 b2 1.65 2.39 0.065 0.094 b4 2.59 3.43 0.102 0.135 c 0.38 0.89 0.015 0.035 d 20.79 21.45 0.819 0.844 d1 typ. 8.90 typ. 0.350 d2 typ. 2.90 typ. 0.114 d3 typ. 1.00 typ. 0.039 e 15.49 16.24 0.610 0.639 e1 typ. 13.45 typ. 0.530 e2 4.31 5.48 0.170 0.216 e3 typ. 4.00 typ. 0.157 e 5.46 bsc 0.215 bsc l 19.80 20.30 0.780 0.799 l1 - 4.49 - 0.177 ? p 3.55 3.65 0.140 0.144 q 5.38 6.19 0.212 0.244 s 6.14 bsc 0.242 bsc dim. millimeter inches 2 1 3 outlines iso247 ixys reserves the right to change limits, condition s and dimensions. 20161111a data according to iec 60747and per semiconductor un less otherwise specified ? 2016 ixys all rights reserved
CLA40MT1200NHR 0.01 0.1 1 60 80 100 120 140 1 6 0 0.5 1.0 1.5 2.0 0 10 20 30 40 10 0 10 1 10 2 10 3 10 4 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i tsm [a] i t [ a] v t [v] t [ms] z thjc [k/w] 2 3 4 5 6 7 8 9 01 1 10 100 1 0 00 i 2 t [a 2 s] t [ms] i t(av)m [a] t c [c] 0 25 50 75 100 125 150 175 0 10 20 30 40 50 60 fig. 1 forward characteristics fig. 3 i 2 t versus time (1-10 ms) t [s] fig. 6 max. forward current at case temperature fig. 2 surge overload current fig. 8 transient thermal impedance junction to case t vj = 25c t vj = 125c t vj = 45c 50 hz, 80% v rrm t vj = 125c t vj = 45c v r = 0 v 125c 150c 0 10 20 0 10 20 30 40 i t(av) [a] p (av) [w] fig. 7a power dissipation versus direct output current fig. 7b and ambient temperature 0 50 100 150 t amb [c] dc = 1 0.5 0.4 0.33 0.17 0.08 10 100 1000 1 10 100 1000 1 10 100 1000 0.1 1 10 100 i g [ma] v g [ v] t gd [s] i g [ma] typ. limit t vj = 125c fig. 4 gate trigger characteristics fig. 5 gate controlled delay time 1: i gd , t vj = 150c 2: i gt , t vj = 25c 3: i gt , t vj = -40c dc = 1 0.5 0.4 0.33 0.17 0.08 r thha 0.6 0.8 1.0 2.0 4.0 8.0 i gd , t vj = 125c 4: p gav = 0.5 w 5: p gm = 2.5 w 6: p gm = 5 w 6 5 4 3 2 1 r thi [k/w] t i [s] 0.10 0.010 0.09 0.001 0.25 0.040 0.31 0.250 0.45 0.150 thyristor ixys reserves the right to change limits, condition s and dimensions. 20161111a data according to iec 60747and per semiconductor un less otherwise specified ? 2016 ixys all rights reserved
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